Recent deep-submicron technology-based integrated circuits (ICs) are substantially more susceptible to transient faults. Thus, the soft errors that occurred due to transient faults are more important than they have ever been. As a result, it is critical to identify any functional inconsistencies and component failures as early in the design process as possible in order to avoid potentially threatening events. Early stage analysis of the integrated circuits enables designers to build fault tolerant systems by applying some fault-mitigation techniques. Existing methodologies for investigating single event transients (SETs) or single event multiple transients (SEMTs) faults often lack the ability to perform system analysis due to the state-explosion (such as simulation-based testing) or due to the ignoring of post-layout information (such as netlist-based analysis).
In this seminar, we will present a methodology based on modeling SETs and SEMTs as a satisfiabilty (SAT) problem. In addition, we include the effect of SEMT on the integrated circuit (IC) device by considering its post-layout information and modeling their propagations throughout the circuit by taking into account all three masking factors (e.g. logical masking, electrical masking, and latching-window effect). The methodology also provides insights into design vulnerabilities and critical areas of the IC layout. It is further extended to estimate the vulnerabilities of processor registers while running a specific application. This methodology has been packaged as a tool, called META. A demonstration of the tool will be conducted at end of the presentation.
Dr. Ait Mohamed has several years of hardware verification experience. He contributed to the MDG tool; a formal verification tool developed at the University of Montreal, he introduced the use of formal methods in the hardware design flow within the verification group of the Scalable Switch Fabric Project at Nortel Networks which was a new generation of optical switch scalable up to 4.8 T/s, then he introduced a hardware functional verification course at Concordia University. Recently, Dr Ait Mohamed’s team realized significant contributions in high-level reliability analysis of complex systems using formal methods. He is co-investigator of a major project in the cyber security of cooperative autonomous networked unmanned vehicles (CANUMV) with National Defence, Canada with FOUR (4) academic organizations, FOUR (4) industrial and TWO (2) governmental agency partners. His main contribution in this project is related to High Assurance and Certifiability of CANUMV Assets. He also contributed to the OVNIPROM project initiated by TIMA to analyse the radiations effects on many core implementations of satellite board computer. In his career, he has trained 25 MAScs, 14 PhDs, and 3 PDFs.